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Alif Semiconductor /AE722F80F55D5LS_CM55_HE_View /M55HE_NVIC_S /NVIC_IPR[96]

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Interpret as NVIC_IPR[96]

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (Val_0x0)PRI_N00PRI_N10PRI_N20PRI_N3

PRI_N0=Val_0x0

Description

Interrupt Priority Register (n)

Fields

PRI_N0

Allows to set or read the priority level for interrupt 0

0 (Val_0x0): Priority level is 0 (highest)

1 (Val_0x1): Priority level is 1

255 (Val_0xFF): Priority level is 255 (lowest)
PRI_N1

Allows to set or read the priority level for interrupt 1
PRI_N2

Allows to set or read the priority level for interrupt 2
PRI_N3

Allows to set or read the priority level for interrupt 3

Links

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Register License

THIS SOFTWARE IS PROVIDED “AS IS”. NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. ALIF SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data